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ISVLSI
2005
IEEE

Balancing System Level Pipelines with Stage Voltage Scaling

14 years 5 months ago
Balancing System Level Pipelines with Stage Voltage Scaling
This paper presents an approach to dynamically balance the pipeline by scaling the stage supply voltages. Simulation results show that by such an approach about 50% improvement in throughput and response time, and 11% improvement in power consumption can be achieved with limited memory overhead.
Hui Guo, Sri Parameswaran
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where ISVLSI
Authors Hui Guo, Sri Parameswaran
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