TSP
2008
14 years 10 days ago
2008
The focus of this paper is on VLIW instruction scheduling that minimizes the variation of power consumed by the processor during the execution of a target program. We use rough set...
PACS
2000
Springer
14 years 4 months ago
2000
Springer
Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasi...
DSD
2006
IEEE
14 years 6 months ago
2006
IEEE
We propose a power model for the Nostrum NoC. For this purpose an empirical power model of links and switches has been formulated and validated with the Synopsys Power Compiler. T...
DATE
2006
IEEE
14 years 6 months ago
2006
IEEE
In this paper we present a state dependent analytical leakage power model for FPGAs. The model accounts for subthreshold leakage and gate leakage in FPGAs, since these are the two...
IPPS
2008
IEEE
14 years 6 months ago
2008
IEEE
With the emergence of multicore network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing signi...
SLIP
2009
ACM
14 years 7 months ago
2009
ACM
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...