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ASYNC
2003
IEEE
72views Hardware» more  ASYNC 2003»
14 years 5 months ago
SNAP: A Sensor-Network Asynchronous Processor
We present a Sensor-Network Asynchronous Processor (SNAP), which we have designed to be both a processor core for a sensor-network node and a component of a chip multiprocessor, t...
Clinton Kelly IV, Virantha N. Ekanayake, Rajit Man...
ISCAS
2005
IEEE
123views Hardware» more  ISCAS 2005»
14 years 5 months ago
Sub-operation parallelism optimization in SIMD processor synthesis and its experimental evaluations
Abstract— In this paper, we propose a sub-operation parallelism optimization algorithm in SIMD processor synthesis. Given an initial assembly code and timing constraints, our alg...
Nozomu Togawa, Hideki Kawazu, Jumpei Uchida, Yuich...
FPT
2005
IEEE
98views Hardware» more  FPT 2005»
14 years 6 months ago
Secure Partial Reconfiguration of FPGAs
SRAM FPGAs are vulnerable to security breaches such as bitstream cloning, reverse-engineering, and tampering. Bitstream encryption and authentication are two most effective and pr...
Amir Sheikh Zeineddini, Kris Gaj
SUTC
2008
IEEE
14 years 6 months ago
An Embedded Computing Platform for Robot
As the robotic industry is growing boomingly, the functionalities and system's architecture of robots are more and more complex. The development of robotic application system...
Ching-Han Chen, Sz-Ting Liou
SASP
2008
IEEE
101views Hardware» more  SASP 2008»
14 years 6 months ago
Custom Processor Core Construction from C Code
—In this paper we present a method for construction of application specific processor cores from a given C code. Our approach consists of three phases. We start by quantifying t...
Jelena Trajkovic, Daniel D. Gajski
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
14 years 6 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
DATE
2008
IEEE
138views Hardware» more  DATE 2008»
14 years 6 months ago
Functional Self-Testing for Bus-Based Symmetric Multiprocessors
Functional, instruction-based self-testing of microprocessors has recently emerged as an effective alternative or supplement to other testing approaches, and is progressively adop...
Andreas Apostolakis, Dimitris Gizopoulos, Mihalis ...