TC
2008
14 years 6 days ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
AES
2005
Springer
14 years 6 days ago
2005
Springer
Media-processing applications, such as signal processing, 2D and 3D graphics rendering, and image compression, are the dominant workloads in many embedded systems today. The real-...
ASPDAC
2001
ACM
14 years 4 months ago
2001
ACM
Hardware/software partitioning is one of the key processes in a hardware/software cosynthesis system for digital signal processor cores. In hardware/software partitioning, area and...
CF
2007
ACM
14 years 4 months ago
2007
ACM
This paper proposes the use of very small instruction caches, called micro-caches (
FCCM
1999
IEEE
14 years 4 months ago
1999
IEEE
Technology scaling of CMOS processes brings relatively faster transistors (gates) and slower interconnects (wires), making viable the addition of reconfigurability to increase per...
ISCA
2000
IEEE
14 years 4 months ago
2000
IEEE
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
CODES
2000
IEEE
14 years 4 months ago
2000
IEEE
The concept of system-on-a-chip is becoming increasingly popular for the integration of complex systems. New types of processor cores are now available that enable the designer to...
MICRO
2002
IEEE
14 years 5 months ago
2002
IEEE
Simultaneous multithreading seeks to improve the aggregate computation bandwidth of a processor core by sharing resources such as functional units, caches, TLB and so on. To date,...
FPL
2003
Springer
14 years 5 months ago
2003
Springer
Abstract. A smart transducer network hosts various nodes with different functionality. Our approach offers the possibility to design different smart transducer nodes as a system...
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
In this paper the application of Instruction Set Emulation for rapid prototyping of SoCs will be presented. The emulation works in a way that both the software and the hardware be...