DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper reports a novel simulation methodology for analysis and prediction of substrate noise impact on analog / RF circuits taking into account the role of the parasitic resis...
GLVLSI
2009
IEEE
14 years 3 months ago
2009
IEEE
A methodology is proposed to efficiently estimate the substrate noise generated by large scale aggressor circuits. Small spatial voltage differences within the ground distribution...
DAC
1996
ACM
14 years 3 months ago
1996
ACM
A novel methodology for circuit design and automatic layout generation is proposed for a class of mixed-signal circuits in presence of layout parasitics and substrate induced nois...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
Interconnects have deserved attention as a source of crosstalk to other interconnects, but have been ignored as a source of substrate noise. In this paper, we evaluate the importa...
ISCAS
2005
IEEE
14 years 5 months ago
2005
IEEE
—This work presents an experimental investigation about the relation between specific characteristics of a digital circuit (clock frequency and architecture) and the substrate no...
ASPDAC
2006
ACM
14 years 5 months ago
2006
ACM
— In this paper, we introduce a novel substrate noise estimation technique during early floorplanning, based on the concept of Block Preference Directed Graph (BPDG) and the cla...