This site uses cookies to deliver our services and to ensure you get the best experience. By continuing to use this site, you consent to our use of cookies and acknowledge that you have read and understand our Privacy Policy, Cookie Policy, and Terms
– This paper describes a new technique for extracting clock-level finite state machines(FSMs) from transistor netlists using symbolic simulation. The transistor netlist is prepr...
Manish Pandey, Alok Jain, Randal E. Bryant, Derek ...
In this paper, we provide a flexible and automatic method to partition the functional space for efficient symbolic simulation. We utilize a 2-tuple list representation as the basi...
Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan ...
Symbolic simulation involves evaluating circuit behavior using special symbolic values to encode a range of circuit operating conditions. In one simulation run, a symbolic simulat...
Abstract — This paper presents a functional-space decomposition approach to enhance the capability of symbolic simulation. In our symbolic simulator, the control part and datapat...
The miniaturization of transistors in recent technology nodes requires tremendous back-end tuning and optimizations, making bug fixing at later design stages more expensive. Ther...
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...