ISCAS
2011
IEEE
13 years 8 months ago
2011
IEEE
—We propose a multi-layer parallel decoding algorithm and VLSI architecture for decoding of structured quasi-cyclic low-density parity-check codes. In the conventional layered de...
TVLSI
2010
13 years 11 months ago
2010
:- This paper describes the design and VLSI architecture for a 4x4 breadth first K-Best MIMO decoder using a 64 QAM scheme. A novel sort free approach to path extension, as well as...
VLSISP
2002
14 years 4 months ago
2002
Abstract. This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband proc...
ISQED
2009
IEEE
14 years 11 months ago
2009
IEEE
For effective digital rights management (DRM) of multimedia in the framework of embedded systems, both watermarking and cryptography are necessary. In this paper, we present a wat...