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VLSID
2006
IEEE
153views VLSI» more  VLSID 2006»
14 years 12 months ago
An Asynchronous Interconnect Architecture for Device Security Enhancement
We present a new style of long-distance, on-chip interconnect, based loosely on the asynchronous GasP architecture. It has a number of advantages over conventional designs, the mo...
Simon Hollis, Simon W. Moore
VLSID
2006
IEEE
148views VLSI» more  VLSID 2006»
14 years 12 months ago
Efficient Design and Analysis of Robust Power Distribution Meshes
With increasing design complexity, as well as continued scaling of supplies, the design and analysis of power/ground distribution networks poses a difficult problem in modern IC d...
Puneet Gupta, Andrew B. Kahng
VLSID
2006
IEEE
121views VLSI» more  VLSID 2006»
14 years 12 months ago
An Integrated Approach for Combining BDD and SAT Provers
Many formal verification tools today are based on Boolean proof techniques. The two most powerful approaches in this context are Binary Decision Diagrams (BDDs) and methods based ...
Rolf Drechsler, Görschwin Fey, Sebastian Kind...
VLSID
2006
IEEE
92views VLSI» more  VLSID 2006»
14 years 12 months ago
A Wideband Frequency-Shift Keying Demodulator for Wireless Neural Stimulation Microsystems
: This paper presents a wideband frequency-shift keying (FSK) demodulator suitable for a digital data transmission chain of wireless neural stimulation microsystems such as cochlea...
Mian Dong, Chun Zhang, Songping Mai, Zhihua Wang, ...
VLSID
2006
IEEE
160views VLSI» more  VLSID 2006»
14 years 12 months ago
An Approach to Architectural Enhancement for Embedded Speech Applications
Advances in Human Computer Interaction(HCI) technology has resulted in widespread development of natural language and speech applications. These applications are known to be compu...
Soumyajit Dey, Susmit Biswas, Arijit Mukhopadhyay,...
VLSID
2006
IEEE
130views VLSI» more  VLSID 2006»
14 years 12 months ago
A New Approach to Synthesize Multiple-Output Functions Using Reversible Programmable Logic Array
In this paper, a new realization for logic functions, namely Reversible Programmable Logic Array (RPLA), has been proposed. The proposed realization has the advantage of regularit...
Ahsan Raja Chowdhury, Rumana Nazmul, Hafiz Md. Has...
VLSID
2006
IEEE
119views VLSI» more  VLSID 2006»
14 years 12 months ago
Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core
Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commer...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
VLSID
2006
IEEE
83views VLSI» more  VLSID 2006»
14 years 12 months ago
Parasitic Aware Routing Methodology Based on Higher Order RLCK Moment Metrics
In the multi-GHz frequency domain, inductive and capacitive parasitics of interconnects can cause significant 'ringing' or overdamping, which may lead to false switching...
Amitava Bhaduri, Ranga Vemuri