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ISCAS
2003
IEEE

A multi-level static memory cell

14 years 5 months ago
A multi-level static memory cell
This paper introduces a static multi-level memory cell that was conceived to store state variables in neuromorphic onchip learning applications. It consists of a capacitance that holds a voltage and an array of ‘fusing’ amplifiers that are connected as followers. These followers drive their output towards the voltage level of the input like normal followers, but only if the difference between input and output is smaller than about 120mV. The inputs to this ’fusing’ follower array determine the stable voltage levels of the memory cell. All follower-outputs are connect to the storage capacitance and thus the voltage is always driven to the closest stable level. The cell content can be changed by injecting current into the capacitance. This form of storage offers arguably a better compromise between desirable and undesirable properties for neuromorphiclearning systems than alternative solutions (e.g. non-volatile analog storage on floating gates or digital static storage in com...
Philipp Häfliger, Håvard Kolle Riis
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where ISCAS
Authors Philipp Häfliger, Håvard Kolle Riis
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