Continuing improvements in semiconductor density are enabling new classes of System-on-a-Chip architectures that combine extensive processing logic and high-density memory. Many of the capabilities of these architectures can be custom tailored to the demands of real-time image processing. This paper identifies and describes candidate computing in memory architectures, and evaluates their performance on several image-processing algorithms.
David L. Landis, Paul T. Hulina, Scott Deno, Luke