Power-aware soft error hardening via selective voltage scaling

—Nanoscale integrated circuits are becoming increasingly sensitive to radiation-induced transient faults (soft errors) due to current technology scaling trends, such as shrinking feature sizes and reducing supply voltages. Soft errors, which have been a significant concern in memories, are now a main factor in reliability degradation of logic circuits. This paper presents a power-aware methodology using dual supply voltages for soft error hardening. Given a constraint on power overhead, our proposed framework can minimize the soft error rate (SER) of a circuit via selective voltage scaling. On average, circuit SER can be reduced by 33.45% for various

• Type: Conference
• Year: 2008
• Where: ICCD
• Authors: Kai-Chiang Wu, Diana Marculescu
• Keywords: Dual Supply Voltages, Hardware, ICCD 2008, Soft Error Rate, Soft Errors