Memory state can be corrupted by the impact of particles causing single-event upsets (SEUs). Understanding and dealing with these soft (or transient) errors is important for syste...
Tunneling based random-access memories (TRAM’s) have recently garnered a great amount of interests among the memory designers due to their intrinsic merits such as reduced power...
Hui Zhang, Pinaki Mazumder, Li Ding 0002, Kyoungho...
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
—Soft errors due to cosmic rays cause reliability problems during lifetime operation of digital systems, which increase exponentially with Moore’s law. The first step in develo...
Soft error due to ionizing radiation is emerging as a major concern for future technologies. The measurement unit for failures due to soft errors is called Failure-In-Time (FIT) t...
— Due to continuous technology scaling, the reduction of nodal capacitances and the lowering of power supply voltages result in an ever decreasing minimal charge capable of upset...
Riaz Naseer, Younes Boulghassoul, Jeff Draper, San...
Soft error due to ionizing radiation is emerging as a major concern for future technologies. The measurement unit for failures due to soft errors is called Failure-In-Time (FIT) t...
With continuing increase in soft error rates, its foreseeable that multiple faults will eventually need to be considered when modeling circuit sensitivity and evaluating faulttole...
Christian J. Hescott, Drew C. Ness, David J. Lilja
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...