Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

100

DAC
1996
ACM

98views Computer Architecture» more DAC 1996»

An Effective Power Management Scheme for RTL Design Based on Multiple Clocks

15 years 7 months ago

An Effective Power Management Scheme for RTL Design Based on Multiple Clocks

Download www.cs.york.ac.uk

Christos A. Papachristou, Mark Spining, Mehrdad No

Real-time Traffic

Computer Architecture | DAC 1996 |

claim paper

Related Content

» A multiple clocking scheme for low power RTL design

» Synthesis of PowerOptimized and AreaOptimized Circuits from Hierarchical Behavioral Descri...

» Clock domain crossing fault model and coverage metric for validation of SoC design

» Beyond RTL Advanced Digital System Design

» Guarded evaluation pushing power management to logic synthesisdesign

» Implementation of a thermal management unit for canceling temperaturedependent clock skew ...

» A critical analysis of applicationadaptive multiple clock processors

» Simultaneous peak and average power minimization during datapath scheduling for DSP proces...

» Accurate Clock Synchronization for IEEE 80211Based MultiHop Wireless Networks

Post Info
More Details (n/a)

Added	08 Aug 2010
Updated	08 Aug 2010
Type	Conference
Year	1996
Where	DAC
Authors	Christos A. Papachristou, Mark Spining, Mehrdad Nourani

Comments (0)