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ICCAD
2001
IEEE

Power-Delay Modeling of Dynamic CMOS Gates for Circuit Optimization

14 years 9 months ago
Power-Delay Modeling of Dynamic CMOS Gates for Circuit Optimization
José Luis Rosselló, Jaume Segura
Added 17 Mar 2010
Updated 17 Mar 2010
Type Conference
Year 2001
Where ICCAD
Authors José Luis Rosselló, Jaume Segura
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