ISPD
14 years 3 months ago
2004 ACM 
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
ISPD
14 years 3 months ago
2004 ACM
VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...
ISPD
14 years 3 months ago
2004 ACM
Many current designs contain a large number of standard cells intermixed with larger macro blocks. The range of size in these “mixed block” designs complicates the placement p...
ISPD
14 years 3 months ago
2004 ACM 
Considering the voltage drop constraint over a distributed model for power/ground (P/G) network, we study the following two problems for physical synthesis of sleep transistors: t...
ISPD
14 years 3 months ago
2004 ACM
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
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Hardware