ICCAD
14 years 6 months ago
2004 IEEE 
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
ICCAD
14 years 6 months ago
2004 IEEE 
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
ICCAD
14 years 6 months ago
2004 IEEE
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
ICCAD
14 years 6 months ago
2004 IEEE 
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
ICCAD
14 years 6 months ago
2004 IEEE
While process variations are becoming more significant with each new IC technology generation, they are often modeled via linear regression models so that the resulting performanc...
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