186 search results - page 17 / 38 » 1995 high level synthesis design repository |
RSP
2005
IEEE
14 years 1 months ago
2005
IEEE
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
Interconnectperformance does not scale well into deep submicron dimensions, and the rising number of analog effects erodes tal abstraction necessary for high levels of integration...
ASPDAC
2001
ACM
13 years 11 months ago
2001
ACM
Asynchronous, self-timed, logic is often eschewed in digital design because of its ad-hoc methodologies and lack of available design tools. This paper describes a complete High Le...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
FM
1999
Springer
13 years 12 months ago
1999
Springer
ÐIn this paper, we describe the incremental specification of a power transformer station controller using a controller synthesis methodology. We specify the main requirements as s...