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RTCSA
2006
IEEE
14 years 1 months ago
Instruction Scheduling with Release Times and Deadlines on ILP Processors
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
Hui Wu, Joxan Jaffar, Jingling Xue
ESTIMEDIA
2006
Springer
13 years 11 months ago
Design of a WCET-Aware C Compiler
This paper presents techniques to tightly integrate worstcase execution time (WCET) information into a compiler framework. Currently, a tight integration of WCET information into ...
Heiko Falk, Paul Lokuciejewski, Henrik Theiling
ICCAD
2001
IEEE
101views Hardware» more  ICCAD 2001»
14 years 4 months ago
Instruction Generation for Hybrid Reconfigurable Systems
In this work, we present an algorithm for simultaneous template generation and matching. The algorithm profiles the graph and iteratively contracts edges to create the templates. ...
Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzad...
IESS
2007
Springer
156views Hardware» more  IESS 2007»
14 years 1 months ago
Automatic Data Path Generation from C code for Custom Processors
The stringent performance constraints and short time to market of modern digital systems require automatic methods for design of high performance applicationspeciļ¬c architectures...
Jelena Trajkovic, Daniel Gajski
DAC
2006
ACM
14 years 1 months ago
A systematic method for functional unit power estimation in microprocessors
We present a new method for mathematically estimating the active unit power of functional units in modern microprocessors such as the Pentium 4 family. Our method leverages the ph...
Wei Wu, Lingling Jin, Jun Yang 0002, Pu Liu, Sheld...