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» A Counterflow Pipeline Experiment
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DAC
1994
ACM
15 years 11 months ago
Synthesis of Instruction Sets for Pipelined Microprocessors
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
Ing-Jer Huang, Alvin M. Despain
204
Voted
DATE
2006
IEEE
97views Hardware» more  DATE 2006»
15 years 11 months ago
Monolithic verification of deep pipelines with collapsed flushing
We introduce collapsed flushing, a new flushing-based refinement map for automatically verifying safety and liveness properties of term-level pipelined machine models. We also pre...
Roma Kane, Panagiotis Manolios, Sudarshan K. Srini...
238
Voted
BMCBI
2011
15 years 2 months ago
ATAQS: A computational software tool for high throughput transition optimization and validation for selected reaction monitoring
Background: Since its inception, proteomics has essentially operated in a discovery mode with the goal of identifying and quantifying the maximal number of proteins in a sample. I...
Mi-Youn K. Brusniak, Sung-Tat Kwok, Mark Christian...
SAMOS
2004
Springer
16 years 25 days ago
Self-loop Pipelining and Reconfigurable Dataflow Arrays
Abstract. This paper presents some interesting concepts of static dataflow machines that can be used by reconfigurable computing architectures. We introduce some data-driven reconf...
João M. P. Cardoso
DAC
2006
ACM
16 years 8 months ago
Synthesis of high-performance packet processing pipelines
Packet editing is a fundamental building block of data communication systems such as switches and routers. Circuits that implement this function are critical and define the featur...
Cristian Soviani, Ilija Hadzic, Stephen A. Edwards