714 search results - page 36 / 143 » A Decompression Architecture for Low Power Embedded Systems |
143
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CODES
2003
IEEE
15 years 9 months ago
2003
IEEE
NAND flash memory has become an indispensable component in mobile embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cost and ...
119
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DAC
2008
ACM
16 years 5 months ago
2008
ACM
Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temper...
151
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DDECS
2007
IEEE
15 years 10 months ago
2007
IEEE
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
168
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DAC
2006
ACM
16 years 5 months ago
2006
ACM
Most existing dynamic voltage scaling (DVS) schemes for multiple tasks assume an energy cost function (energy consumption versus execution time) that is independent of the task ch...
131
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VLSISP
1998
15 years 3 months ago
1998
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...