49 search results - page 6 / 10 » A Dynamic Compilation Framework for Controlling Microprocess... |
DFT
2009
IEEE
14 years 2 months ago
2009
IEEE
We propose a framework that allows dual-layer cooperative error control in a nanoscale network-on-chip (NoC), to simultaneously improve reliability, performance and energy efficie...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
ISCA
2010
IEEE
14 years 24 days ago
2010
IEEE
As technology scales ever further, device unreliability is creating excessive complexity for hardware to maintain the illusion of perfect operation. In this paper, we consider whe...
ISCA
2002
IEEE
14 years 20 days ago
2002
IEEE
On-chip caches represent a sizable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potential...
DATE
2010
IEEE
14 years 25 days ago
2010
IEEE
We present a framework and control policies for optimizing dynamic control of various self-tuning parameters over lifetime in the presence of circuit aging. Our framework introduc...