Sciweavers

1834 search results - page 358 / 367
» A Dynamic Multithreading Processor
Sort
View
PLDI
2003
ACM
14 years 2 months ago
Automatically proving the correctness of compiler optimizations
We describe a technique for automatically proving compiler optimizations sound, meaning that their transformations are always semantics-preserving. We first present a domainspeci...
Sorin Lerner, Todd D. Millstein, Craig Chambers
ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
14 years 1 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
HPDC
2002
IEEE
14 years 1 months ago
Multigrain Parallelism for Eigenvalue Computations on Networks of Clusters
Clusters of workstations have become a cost-effective means of performing scientific computations. However, large network latencies, resource sharing, and heterogeneity found in ...
James R. McCombs, Andreas Stathopoulos
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
14 years 1 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
MICRO
2002
IEEE
127views Hardware» more  MICRO 2002»
14 years 1 months ago
DELI: a new run-time control point
The Dynamic Execution Layer Interface (DELI) offers the following unique capability: it provides fine-grain control over the execution of programs, by allowing its clients to obse...
Giuseppe Desoli, Nikolay Mateev, Evelyn Duesterwal...