68 search results - page 7 / 14 » A Family of Logical Fault Models for Reversible Circuits |
CAMP
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract— The promise of next-generation computer technologies, such as nano-electronics, implies a number of serious alterations to the design flow of digital circuits. One of ...
ISPD
1999
ACM
13 years 11 months ago
1999
ACM
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a systematic design methodology for yield enhancement of asynchronous logic circuits using 3-D (3-Dimensional) integration technology. In this design, the targ...
DDECS
2007
IEEE
14 years 1 months ago
2007
IEEE
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
ISMVL
2007
IEEE
14 years 1 months ago
2007
IEEE
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...