Sciweavers

68 search results - page 8 / 14
» A Family of Logical Fault Models for Reversible Circuits
Sort
View
MCU
1998
154views Hardware» more  MCU 1998»
13 years 8 months ago
A computation-universal two-dimensional 8-state triangular reversible cellular automaton
A reversible cellular automaton (RCA) is a cellular automaton (CA) whose global function is injective and every configuration has at most one predecessor. Margolus showed that the...
Katsunobu Imai, Kenichi Morita
ITC
2003
IEEE
141views Hardware» more  ITC 2003»
14 years 22 days ago
Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic Circuits
In this paper, a new paradigm for designing logic circuits with concurrent error detection (CED) is described. The key idea is to exploit the asymmetric soft error susceptibility ...
Kartik Mohanram, Nur A. Touba
MICRO
2006
IEEE
159views Hardware» more  MICRO 2006»
13 years 7 months ago
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
GLVLSI
2005
IEEE
83views VLSI» more  GLVLSI 2005»
14 years 1 months ago
Diagnosing multiple transition faults in the absence of timing information
As timing requirements in today’s advanced VLSI designs become more aggressive, the need for automated tools to diagnose timing failures increases. This work presents two such a...
Jiang Brandon Liu, Magdy S. Abadir, Andreas G. Ven...
SPLC
2007
13 years 8 months ago
Feature Diagrams and Logics: There and Back Again
Feature modeling is a notation and an approach for modeling commonality and variability in product families. In their basic form, feature models contain mandatory/optional feature...
Krzysztof Czarnecki, Andrzej Wasowski