Sciweavers

34 search results - page 2 / 7
» A General Purpose, Highly Efficient Communication Controller...
Sort
View
COMPSYSTECH
2009
13 years 4 months ago
Polymorphic architectures: from media processing to supercomputing
: This paper reveals the evolution of the polymorphic architectures in the context of ever increasing computational demands of the user applications and the need for formal archite...
Georgi Kuzmanov
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
13 years 10 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
DATE
2006
IEEE
134views Hardware» more  DATE 2006»
14 years 1 months ago
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
14 years 1 months ago
Tradeoffs in designing accelerator architectures for visual computing
Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, vid...
Aqeel Mahesri, Daniel R. Johnson, Neal C. Crago, S...
DATE
1998
IEEE
108views Hardware» more  DATE 1998»
13 years 11 months ago
Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor
The demands in terms of processing performance, communication bandwidth and real-time throughput of many multimedia applications are much higher than today's processing archi...
Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin...