193 search results - page 10 / 39 » A High Level Power Model for the Nostrum NoC |
DSRT
2009
IEEE
13 years 11 months ago
2009
IEEE
The recent emergence of dramatically large computational power, spanning desktops with multicore processors and multiple graphics cards to supercomputers with 105 processor cores,...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
—This paper addresses the problem of chip level thermal profile estimation using runtime temperature sensor readings. We address the challenges of a) availability of only a few t...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
VLSID
2006
IEEE
14 years 1 months ago
2006
IEEE
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
ICRA
2005
IEEE
14 years 1 months ago
2005
IEEE
— The exoskeleton robot, serving as an assistive device worn by the human (orthotic), functions as a humanamplifier. Setting the human machine interface (HMI) at the neuro-muscu...