122 search results - page 20 / 25 » A High-Performance Hardware Architecture for Spectral Hash A... |
ISSS
1995
IEEE
14 years 5 days ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
DAC
2009
ACM
14 years 1 months ago
2009
ACM
Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has a...
FPL
2003
Springer
14 years 1 months ago
2003
Springer
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
EUROGRAPHICS
2010
Eurographics
14 years 4 months ago
2010
Eurographics
We present a novel approach to ray tracing execution on commodity graphics hardware using CUDA. We decompose
a standard ray tracing algorithm into several data-parallel stages tha...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper provides an overview of the Blue Matter application development effort within the Blue Gene project that supports our scientific simulation efforts in the areas of pro...