145 search results - page 3 / 29 » A Higher-Level Language for Hardware Synthesis |
ISLPED
1997
ACM
14 years 2 months ago
1997
ACM
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
DATE
2000
IEEE
14 years 2 months ago
2000
IEEE
Higher levels of integration, the need for test re-use, and the mixed-signal nature of today’s SOC’s necessitate hierarchical test generation and system level test composition...
DAC
2012
ACM
12 years 6 days ago
2012
ACM
In this paper we introduce Chisel, a new hardware construction language that supports advanced hardware design using highly parameterized generators and layered domain-specific h...
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
ICCAD
1995
IEEE
14 years 1 months ago
1995
IEEE
Abstract -- Telecommunication network management applications often require application-specific ICs that use large dynamically allocated stored data structures. Currently availab...