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» A Java processor architecture for embedded real-time systems
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FPL
2007
Springer
146views Hardware» more  FPL 2007»
14 years 2 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
DAC
2004
ACM
14 years 9 months ago
Multi-profile based code compression
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...
HPCN
1998
Springer
14 years 26 days ago
DISCWorld: A Distributed High Performance Computing Environment
An increasing number of science and engineering applications require distributed and parallel computing resources to satisfy user response-time requirements. Distributed science a...
Kenneth A. Hawick, Heath A. James, Craig J. Patten...
HICSS
2000
IEEE
179views Biometrics» more  HICSS 2000»
14 years 7 days ago
A Novel User Interface for Group Collaboration
Flexible user interfaces that can be customized to meet the needs of the task at hand are particularly important for real-time group collaboration. This paper presents the user in...
Bogdan Dorohonceanu, Boi Sletterink, Ivan Marsic
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
14 years 2 months ago
Fast, predictable and low energy memory references through architecture-aware compilation
The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, curren...
Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefa...