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DAC
2002
ACM
14 years 9 months ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
Lothar Thiele, Matthias Gries, Samarjit Chakrabort...
RTSS
2008
IEEE
14 years 3 months ago
Merging State and Preserving Timing Anomalies in Pipelines of High-End Processors
Many embedded systems are subject to temporal constraints that require advance guarantees on meeting deadlines. Such systems rely on static analysis to safely bound worst-case exe...
Sibin Mohan, Frank Mueller
IESS
2007
Springer
156views Hardware» more  IESS 2007»
14 years 2 months ago
Automatic Data Path Generation from C code for Custom Processors
The stringent performance constraints and short time to market of modern digital systems require automatic methods for design of high performance applicationspecific architectures...
Jelena Trajkovic, Daniel Gajski
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
14 years 9 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
DAC
1995
ACM
14 years 10 days ago
Performance Analysis of Embedded Software Using Implicit Path Enumeration
—Embedded computer systems are characterized by the presence of a processor running application-specific dedicated software. A large number of these systems must satisfy real-ti...
Yau-Tsun Steven Li, Sharad Malik