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» A Logical Viewpoint on Architectures
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ATAL
2006
Springer
15 years 9 months ago
Designing agent chips
We outline meta-encoding schemas for compiling nonmonotonic logic theories into Verilog HDL (Hardware Description Language) descriptions. These descriptions can be synthesized int...
Insu Song, Guido Governatori
CDES
2008
87views Hardware» more  CDES 2008»
15 years 7 months ago
Finding Minimal ESCT Expressions for Boolean Functions with Weight of up to 7
In this paper an algorithm is proposed for the synthesis and exact minimization of ESCT (Exclusive or Sum of Complex Terms) expressions for Boolean functions of up to seven comple...
Dimitrios Voudouris, Marinos Sampson, George K. Pa...
INTEGRATION
2008
89views more  INTEGRATION 2008»
15 years 5 months ago
Exact ESCT minimization for functions of up to six input variables
In this paper an efficient algorithm for the synthesis and exact minimization of ESCT(Exclusive or Sum of Complex Terms) expressions for Boolean functions of at most six variables...
Dimitrios Voudouris, Marinos Sampson, George K. Pa...
DAC
2006
ACM
16 years 6 months ago
Shielding against design flaws with field repairable control logic
Correctness is a paramount attribute of any microprocessor design; however, without novel technologies to tame the increasing complexity of design verification, the amount of bugs...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
ISQED
2007
IEEE
119views Hardware» more  ISQED 2007»
16 years 4 days ago
Optimizing Checking-Logic for Reliability-Agnostic Control of Self-Calibrating Designs
Abstract— Self-calibrating designs have recently gained momentum as an alternative to methods relying on worst-case characterisation of silicon [2], [4], [8]. So far, reliable op...
Frederic Worm, Patrick Thiran, Paolo Ienne