We present a new approach to an interactive design and analysis environment for visual languages. The main components, i.e., editor, animator, and interpreter, are introduced. The...
In this paper we explore the relationship between adder topology and energy efficiency. We compare the energy-delay tradeoff curves of selected 32-bit adder topologies, to determi...
Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, R...
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...
The importance of early performance assessment grows as software systems increase in terms of size, logical distribution and interaction complexity. Lack of time from the side of ...
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...