1604 search results - page 97 / 321 » A Logical Viewpoint on Architectures |
159
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FPGA
2005
ACM
15 years 11 months ago
2005
ACM
Abstract—As the logic capacity of field-programmable gate arrays (FPGAs) increases, they are increasingly being used to implement large arithmetic-intensive applications, which ...
163
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
166
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VLSID
2006
IEEE
15 years 12 months ago
2006
IEEE
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. This paper proposes two novel ...
173
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
141
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DAC
2004
ACM
16 years 6 months ago
2004
ACM
We present a set of techniques for placement-coupled, timingdriven logic replication. Two components are at the core of the approach. First is an algorithm for optimal timingdrive...