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ISLPED
2007
ACM
96views Hardware» more  ISLPED 2007»
13 years 10 months ago
Low-power process-variation tolerant arithmetic units using input-based elastic clocking
In this paper we propose a design methodology for low-power, high-performance, process-variation tolerant architecture for arithmetic units. The novelty of our approach lies in th...
Debabrata Mohapatra, Georgios Karakonstantis, Kaus...
WOA
2001
13 years 10 months ago
How to Support Adaptive Mobile Applications
The Mobile Agent (MA) paradigm seems to be a promising solution for the design and development of distributed value-added services. However, mobility has added complexity to the d...
Antonio Corradi, Rebecca Montanari, Gianluca Tonti...
CIDR
2009
132views Algorithms» more  CIDR 2009»
13 years 9 months ago
uFLIP: Understanding Flash IO Patterns
Does the advent of flash devices constitute a radical change for secondary storage? How should database systems adapt to this new form of secondary storage? Before we can answer t...
Luc Bouganim, Björn Þór Jó...
ASAP
2007
IEEE
153views Hardware» more  ASAP 2007»
13 years 8 months ago
Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
Haibo Zhu, Partha Pratim Pande, Cristian Grecu
DSD
2010
IEEE
221views Hardware» more  DSD 2010»
13 years 6 months ago
Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea...