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» A Methodology for the Formal Verification of FFT Algorithms ...
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DATE
2004
IEEE
136views Hardware» more  DATE 2004»
13 years 11 months ago
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems
Recently a lot of multimedia applications are emerging on portable appliances. They require both the flexibility of upgradeable devices (traditionally software based) and a powerf...
Michele Borgatti, Andrea Capello, Umberto Rossi, J...
FLAIRS
2006
13 years 8 months ago
Formal Verification of Cognitive Models
Cognitive modeling has outgrown the toy problems of the research labs and is increasingly tackling Industrial size applications. This growth is not matched in terms of software to...
A. MacKlem, Fatma Mili
ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
13 years 5 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
ISPD
1997
ACM
100views Hardware» more  ISPD 1997»
13 years 11 months ago
A pseudo-hierarchical methodology for high performance microprocessor design
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...
CORR
2006
Springer
112views Education» more  CORR 2006»
13 years 7 months ago
High-level synthesis under I/O Timing and Memory constraints
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
Philippe Coussy, Gwenolé Corre, Pierre Bome...