1609 search results - page 302 / 322 » A Microeconomic Scheduler for Parallel Computers |
HPCA
2006
IEEE
14 years 8 months ago
2006
IEEE
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
CHI
2002
ACM
14 years 8 months ago
2002
ACM
CPM-GOMS is a modeling method that combines the task decomposition of a GOMS analysis with a model of human resource usage at the level of cognitive, perceptual, and motor operati...
ICDCS
2009
IEEE
14 years 4 months ago
2009
IEEE
Abstract: Current peer-to-peer systems are network-agnostic, often generating large volumes of unnecessary inter-ISP traffic. Although recent work has shown the benefits of ISP-a...
DSN
2007
IEEE
14 years 1 months ago
2007
IEEE
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...