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» A New Approach to Pipeline FFT Processor
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ISCA
2005
IEEE
126views Hardware» more  ISCA 2005»
14 years 2 months ago
A Tree Based Router Search Engine Architecture with Single Port Memories
Pipelined forwarding engines are used in core routers to meet speed demands. Tree-based searches are pipelined across a number of stages to achieve high throughput, but this resul...
Florin Baboescu, Dean M. Tullsen, Grigore Rosu, Su...
VECPAR
2004
Springer
14 years 1 months ago
Automatically Tuned FFTs for BlueGene/L's Double FPU
Abstract. IBM is currently developing the new line of BlueGene/L supercomputers. The top-of-the-line installation is planned to be a 65,536 processors system featuring a peak perfo...
Franz Franchetti, Stefan Kral, Juergen Lorenz, Mar...
DSN
2007
IEEE
14 years 2 months ago
Inherent Time Redundancy (ITR): Using Program Repetition for Low-Overhead Fault Tolerance
A new approach is proposed that exploits repetition inherent in programs to provide low-overhead transient fault protection in a processor. Programs repeatedly execute the same in...
Vimal K. Reddy, Eric Rotenberg
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 5 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
Daniel L. Rosenband
FPL
2007
Springer
97views Hardware» more  FPL 2007»
14 years 13 days ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee