945 search results - page 132 / 189 » A New Method for Design of Robust Digital Circuits |
ISQED
2010
IEEE
14 years 4 months ago
2010
IEEE
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
ICRA
2000
IEEE
14 years 1 months ago
2000
IEEE
Our goal is to make vehicle teleoperation accessible to all users. To do this, we are developing easy-to-use yet capable Web tools which enable efficient, robust teleoperation in...
TCAD
2008
13 years 9 months ago
2008
In this paper, we present a new multipacking-tree (MP-tree) representation for macro placements to handle modern mixed-size designs with large macros and high chip utilization rate...
DATE
2009
IEEE
14 years 1 months ago
2009
IEEE
The inherent reconfigurability of SRAM-based FPGAs enables the use of configurations optimized for the problem at hand. Optimized configurations are smaller and faster than their g...
DAC
2008
ACM
14 years 10 months ago
2008
ACM
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...