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VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
14 years 9 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
ISCA
1998
IEEE
128views Hardware» more  ISCA 1998»
14 years 1 months ago
Analytic Evaluation of Shared-memory Systems with ILP Processors
This paper develops and validates an analytical model for evaluating various types of architectural alternatives for shared-memory systems with processors that aggressively exploi...
Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mar...
MICRO
2009
IEEE
121views Hardware» more  MICRO 2009»
14 years 3 months ago
Improving memory bank-level parallelism in the presence of prefetching
DRAM systems achieve high performance when all DRAM banks are busy servicing useful memory requests. The degree to which DRAM banks are busy is called DRAM Bank-Level Parallelism ...
Chang Joo Lee, Veynu Narasiman, Onur Mutlu, Yale N...
HPCA
2003
IEEE
14 years 9 months ago
Memory System Behavior of Java-Based Middleware
Java-based middleware, and application servers in particular, are rapidly gaining importance as a new class of workload for commercial multiprocessor servers. SPEC has recognized ...
Martin Karlsson, Kevin E. Moore, Erik Hagersten, D...
IPPS
2010
IEEE
13 years 6 months ago
Highly scalable parallel sorting
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...
Edgar Solomonik, Laxmikant V. Kalé