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» A Note on Designing Logical Circuits Using SAT
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ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
13 years 11 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
WISES
2003
13 years 9 months ago
Logical versus Physical Programming for Ubiquitous Applications
— Ubiquitous computing provides services to users, according to their current situation. Interactions with such programs are as implicit as possible. We find among the applicati...
Julien Pauty, Michel Banâtre, Paul Couderc
SIGCSE
2009
ACM
139views Education» more  SIGCSE 2009»
14 years 8 months ago
Abstraction and extensibility in digital logic simulation software
ion and Extensibility in Digital Logic Simulation Software Richard M. Salter and John L. Donaldson Computer Science Department Oberlin College Oberlin, OH 44074 rms@cs.oberlin.edu,...
Richard M. Salter, John L. Donaldson
ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
13 years 11 months ago
Layout Driven Logic Restructuring/Decomposition
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
Massoud Pedram, Narasimha B. Bhat
GLVLSI
2003
IEEE
185views VLSI» more  GLVLSI 2003»
14 years 1 months ago
Noise tolerant low voltage XOR-XNOR for fast arithmetic
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
Mohamed A. Elgamel, Sumeer Goel, Magdy A. Bayoumi