18 search results - page 1 / 4 » A Parallel Circuit-Partitioned Algorithm for Timing Driven C... |
ICCD
1997
IEEE
14 years 3 months ago
1997
IEEE
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing bas...
ICCAD
2001
IEEE
14 years 8 months ago
2001
IEEE
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
EGPGV
2004
Springer
14 years 4 months ago
2004
Springer
This paper investigates assignment strategies (load balancing algorithms) for process farms which solve the problem of online placement of a constant number of independent tasks w...
DAC
2006
ACM
15 years 4 days ago
2006
ACM
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
ICCAD
2004
IEEE
14 years 8 months ago
2004
IEEE
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...