1234 search results - page 35 / 247 » A Scheduling and Pipelining Algorithm for Hardware Software ... |
119
Voted
CODES
2007
IEEE
15 years 9 months ago
2007
IEEE
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
134
Voted
ISSS
1996
IEEE
15 years 7 months ago
1996
IEEE
The paper presents two heuristics for hardware/software partitioning of system level specifications. The main objective is to achieve performance optimization with a limited hardw...
124
Voted
DATE
2009
IEEE
15 years 9 months ago
2009
IEEE
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
120
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ICCAD
2008
IEEE
15 years 11 months ago
2008
IEEE
— This paper presents a fast analytical method for estimating the throughput of pipelined asynchronous systems, and then applies that method to develop a fast solution to the pro...
125
Voted
CHES
2005
Springer
2005
Springer
Scalable Hardware for Sparse Systems of Linear Equations, with Applications to Integer Factorization
15 years 8 months ago
Motivated by the goal of factoring large integers using the Number Field Sieve, several special-purpose hardware designs have been recently proposed for solving large sparse system...