1234 search results - page 97 / 247 » A Scheduling and Pipelining Algorithm for Hardware Software ... |
135
Voted
DATE
2010
IEEE
15 years 7 months ago
2010
IEEE
— Ubiquitous image processing tasks (such as transform decompositions, filtering and motion estimation) do not currently provide graceful degradation when their clock-cycles budg...
105
Voted
ISQED
2003
IEEE
15 years 8 months ago
2003
IEEE
An algorithm for mapping core terminals to System-On-a-Chip (SOC) I/O pins and scheduling tests in order to achieve costefficient concurrent test for core-based designs is present...
118
Voted
ICCD
2006
IEEE
15 years 11 months ago
2006
IEEE
— High secure cryptographic systems require large bit-length encryption keys which presents a challenge to their efficient hardware implementation especially in embedded devices...
98
Voted
FPL
2003
Springer
15 years 8 months ago
2003
Springer
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
114
Voted
GLVLSI
2005
IEEE
15 years 8 months ago
2005
IEEE
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...