340 search results - page 2 / 68 » A Statistical Performance Simulation Methodology for VLSI Ci... |
DAC
1999
ACM
14 years 9 months ago
1999
ACM
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
ISQED
2009
IEEE
14 years 3 months ago
2009
IEEE
A system-level statistical analysis methodology is described that captures the impact of inter- and intra-die process variations for read timing failures in SRAM circuit blocks. U...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, fo...
VLSID
2003
IEEE
14 years 9 months ago
2003
IEEE
In this paper we present statistical timing driven hMetisbased partitioning. We approach timing driven partitioning from a different perspective: we use the statistical timing cri...