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» A Structural Approach for Transistor Circuit Synthesis
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ASPDAC
2010
ACM
161views Hardware» more  ASPDAC 2010»
13 years 6 months ago
A dual-MST approach for clock network synthesis
Abstract--In nanometer-scale VLSI physical design, clock network becomes a major concern on determining the total performance of digital circuit. Clock skew and PVT (Process, Volta...
Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham, Evangel...
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
14 years 5 months ago
Algorithms for simultaneous consideration of multiple physical synthesis transforms for timing closure
We propose a post-placement physical synthesis algorithm that can apply multiple circuit synthesis and placement transforms on a placed circuit to improve the critical path delay ...
Huan Ren, Shantanu Dutt
DAC
2005
ACM
14 years 9 months ago
Designing logic circuits for probabilistic computation in the presence of noise
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
ASYNC
2003
IEEE
119views Hardware» more  ASYNC 2003»
14 years 1 months ago
Asynchronous DRAM Design and Synthesis
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
Virantha N. Ekanayake, Rajit Manohar
ISCAS
1999
IEEE
114views Hardware» more  ISCAS 1999»
14 years 26 days ago
Nonuniformly offset polyphase synthesis of a bandpass signal from complex-envelope samples
In this paper we consider the synthesis of a bandpass signal from complex-envelope samples using a polyphase conversion structure based on periodically nonuniform output samples. ...
D. Scholnik, J. O. Coleman