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» A Study on Impact of Leakage Current on Dynamic Power
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VLSID
2009
IEEE
107views VLSI» more  VLSID 2009»
14 years 8 months ago
Temperature Aware Scheduling for Embedded Processors
Power density has been increasing at an alarming rate in recent processor generations resulting in high on-chip temperature. Higher temperature results in poor reliability and inc...
Ramkumar Jayaseelan, Tulika Mitra
ISQED
2009
IEEE
91views Hardware» more  ISQED 2009»
14 years 2 months ago
Variability-aware optimization of nano-CMOS Active Pixel Sensors using design and analysis of Monte Carlo experiments
We propose a novel design flow for mismatch and processvariation aware optimization of nanoscale CMOS Active Pixel Sensor (APS) arrays. As a case study, an 8 × 8 APS array is de...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
14 years 1 months ago
Low energy asynchronous architectures
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...
Ilya Obridko, Ran Ginosar
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
14 years 2 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
DATE
2005
IEEE
115views Hardware» more  DATE 2005»
14 years 1 months ago
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach
— A novel power attack resistant cryptosystem is presented in this paper. Security in digital computing and communication is becoming increasingly important. Design techniques th...
Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan,...