Power density has been increasing at an alarming rate in recent processor generations resulting in high on-chip temperature. Higher temperature results in poor reliability and inc...
We propose a novel design flow for mismatch and processvariation aware optimization of nanoscale CMOS Active Pixel Sensor (APS) arrays. As a case study, an 8 × 8 APS array is de...
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
— A novel power attack resistant cryptosystem is presented in this paper. Security in digital computing and communication is becoming increasingly important. Design techniques th...
Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan,...