294 search results - page 21 / 59 » A System Level Resource Estimation Tool for FPGAs |
SIGMETRICS
2011
ACM
13 years 1 months ago
2011
ACM
The workloads in modern Chip-multiprocessors (CMP) are becoming increasingly diversified, creating different resource demands on hardware substrate. It is necessary to allocate h...
VLSID
2004
IEEE
14 years 11 months ago
2004
IEEE
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
GECCO
2010
Springer
14 years 2 months ago
2010
Springer
Understanding the evolution of cooperation as part of an evolutionary stable strategy (ESS) is a difficult problem that has been the focus of much work. The associated costs of co...
DAC
2004
ACM
14 years 11 months ago
2004
ACM
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...