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» A Variation Aware High Level Synthesis Framework
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VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
14 years 8 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
NIPS
2004
13 years 9 months ago
Probabilistic Inference of Alternative Splicing Events in Microarray Data
Alternative splicing (AS) is an important and frequent step in mammalian gene expression that allows a single gene to specify multiple products, and is crucial for the regulation ...
Ofer Shai, Brendan J. Frey, Quaid Morris, Qun Pan,...
AMDO
2004
Springer
14 years 1 months ago
Image Cues Fusion for Object Tracking Based on Particle Filter
Particle filter is a powerful algorithm to deal with non-linear and non-Gaussian tracking problems. However the algorithm relying only upon one image cue often fails in challengin...
Peihua Li, François Chaumette
ISCAS
2002
IEEE
201views Hardware» more  ISCAS 2002»
14 years 16 days ago
FGS+: optimizing the joint SNR-temporal video quality in MPEG-4 fine grained scalable coding
To enable video transmission over heterogeneous wireless networks, a highly scalable compression and streaming framework that can adapt to large and rapid bandwidth variations in ...
Raj Kumar Rajendran, Mihaela van der Schaar, Shih-...
ISQED
2010
IEEE
141views Hardware» more  ISQED 2010»
14 years 2 months ago
Assessing chip-level impact of double patterning lithography
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topalog...