Sciweavers

81 search results - page 6 / 17
» A Variation Aware High Level Synthesis Framework
Sort
View
DATE
2009
IEEE
125views Hardware» more  DATE 2009»
14 years 2 months ago
HLS-l: High-level synthesis of high performance latch-based circuits
An inherent performance gap between custom designs and ASICs is one of the reasons why many designers still start their designs from register transfer level (RTL) description rath...
Seungwhun Paik, Insup Shin, Youngsoo Shin
TCAD
2008
167views more  TCAD 2008»
13 years 7 months ago
System-Level Dynamic Thermal Management for High-Performance Microprocessors
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....
VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
14 years 1 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
ICIP
2009
IEEE
13 years 5 months ago
An automatic Structure-Aware image extrapolation applied to error concealment
A novel framework for spatially estimating unknown image data is presented. Common applications include inpainting, concealment of transmission errors, prediction in video coding,...
Haricharan Lakshman, Patrick Ndjiki-Nya, Martin K&...
ICRA
2008
IEEE
297views Robotics» more  ICRA 2008»
14 years 2 months ago
Fast 3D reconstruction of human shape and motion tracking by parallel fast level set method
— This paper presents a parallel algorithm of the Level Set Method named the Parallel Fast Level Set Method, and its application for real-time 3D reconstruction of human shape an...
Yumi Iwashita, Ryo Kurazume, Kenji Hara, Seiichi U...