2695 search results - page 9 / 539 » A Visual Approach to Validating System Level Designs |
SAMOS
2005
Springer
14 years 2 months ago
2005
Springer
Design space exploration plays an essential role in the system-level design of embedded systems. It is imperative therefore to have efficient and effective exploration tools in th...
TVLSI
2008
13 years 8 months ago
2008
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
The objective of this paper is to introduce dependability as an optimization criterion in the system-level design process of embedded systems. Given the pervasiveness of embedded ...
FDL
2007
IEEE
14 years 3 months ago
2007
IEEE
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...